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Audio sensor with an ATtiny45

Audio sensor with an ATtiny45

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Audio sensor with an ATtiny45 This simple sensor reacts on steep audio signals and answers with a signal tone. Audio signal strength is continuously displayed on a red/green duo-led. If you already own a clap sensor that uses a large amount of electronic components you'll be surprised on the low count of components required here.

0 Overview

  1. Hardware
  2. mounting
  3. operation
  4. Software

1 Hardware

1.1 Schematic

Audio sensor schematic The controller ATtiny45 does all the usual work and controls the few external components.

Power supply are two AAA batteries in series, providing 3 V DC. Power consumption is normally 1.5 mA, during alarm up to 15 mA.

The tone signal is taken up with an electret microphone. The source voltage of the microphone is fed through a 10k resistor, the resulting voltage of roughly 1.37 V drives the ADC2 input pin of the ATtiny45. The microphone voltage is filtered through a 100k/100nF RC network, which averages the voltage (filtering AC out) and by that provides the differential voltage on the ADC3 pin. The built-in differential amplifier of the ATtiny45 amplifies the difference by 20 to get enough amplitude from the signal input.

The duo-led displays the peak voltages, averaged over 64 measurements, in green color. The louder the signal gets the lighter the LED.

If 30 peak voltage measurements out of 64 exceed the trigger limit (1.5 times the last measured average), the alarm gets active. The duo-led turns fully red, the red LED is turned half on and the speaker generates a 1,000 Hz tone. The alarm is turned off after two seconds.

The ISP6 interface allows to program the ATtiny45 within the board. For programming the jumper J1 has to be turned off to disconnect the speaker from the MOSI programming pin.

1.2 How it works

ADC function of the audio sensor The controller measures continuously the difference on the two input pins ADC2-ADC3, amplifies the difference by 20 and measures the resulting signal by comparing it with the internal reference voltage of 1.1 V. The result of the 8-bit ADC is between 0 and 255. This covers a differential input voltage range of 1.1 / 20 = 55 mV resp. 39 mVeff. Only positive half waves are measured.

The ADC works with a controller clock of 2 MHz, divided by two, and requires 13 ADC clock cycles per conversion. The interrupt service routine that is called on conversion complete events needs between 21 and 38 controller clock cycles to restart the next conversion, so a conversion frequency of between 26 and 43 kHz results. A tone of 1,000 Hz is therefore measured at least 25 times, of which 12 to 13 measurements are zero, leaving 12 to 13 successive measurents per wave.

Top detection To detect maximum signal strengthes the ADC MSB result is continuously compared with the previous result. If the result still increases rITop is set to the new MSB result. If the MSB decreases and gets smaller than rITop and also smaller than the last measurement, the value of rITop is stored in SRAM, together with a 16-bit time stamp (128 µs). The time stamp can be used to only react on certain frequency ranges, but is not used in the software.

If 64 top values are detected in this way, these top values are averaged and displayed on the duo-led (PWM cycle of TC1). The average is further multiplied by 1.5 and stored as trigger value in rTrigger.

If, during averaging, the number of measurements that reach or exceed the trigger value reaches 50%, the alarm phase is entered. The respective LEDs are switched and timer TC0 produces a tone of 880 Hz on its output pin OC1A.

1.3 Other configurations

The hard- and software work with a ATtiny25 and ATtiny85, too. Selection is done in the source code by changing the constant dev_sel on top of the code. When choosing 25 for an ATtiny25 the storage of time stamp information (tstmp) is disabled due to limited SRAM (and EEPROM) storage space. This has no adverse consequences on the functions performed.

Alarm sensitivity, alarm duration and alarm tone can be adjusted in the header section "Adjustable constants" of the source code, as desired.

All hardware connected to the PCB can be tested separately by activating "Debug switches". The two LEDs, the speaker and the microphone can be switched on. In another two debug modes either the raw ADC data or the detected wave maxima can be monitored by writing the data set of the first 64 measurements to EEPROM and halting the controller. The collected data can be read from there.

Page top 1 Hardware 2 Mounting 3 Operation 4 Software

2 Mounting

2.1 PCB

Follow me tn45 PCB The PCB that takes all the components is seen here. It is of a size of 50-by-40 mm and single sided and includes four mounting holes with a diameter of 2.5 mm.

2.2 Component placement

Follow me tn45 PCB component side One wired bridge has to be soldered first. All external components are plugged in via 1 mm pins.

2.3 Box

Follow me in a box Together with the batteries and the peripherals the PCB finds enough space in a 120*70*40 mm plastic box.

Page top 1 Hardware 2 Mounting 3 Operation 4 Software

3 Operation

Operation is simple as the average noise is continuously measured. Only signals that exceed the average by the 1.5-fold lead to alarms.

As the duo-led's brightness reflects the average value one can train the controller to accept very high background levels by increasing the sound slightly over a longer period. This works only well below maximum brightness when the trigger value is still below 255.

Page top 1 Hardware 2 Mounting 3 Operation 4 Software

4 The software

The software is written in AVR assembler and is extensively commented. The source code can be downloaded here or viewed in the browser here. The code uses .if directives and can be assembled either with the gavrasm assembler or with ATMEL's assembler 2 (a how-to-page for assembling with gavrasm is available for Linux here and for Windows here).

Change the configuration constants on top of the source code if you desire different settings or test your hardware.

One special trick was used in the source code. The ADC routine had to be very quick to sample the audio signal with a high-enough frequency and to not overflow the controller with the high rate of ADC measurements. Therefore the clock frequency of the controller is increased from its 1 MHz default clock frequency to 2 MHz. No fuses have to be changed for that, the source code changes the CLKPR divider by software at startup.

See the source code file for further hints on how it works.

Page top 1 Hardware 2 Mounting 3 Operation 4 Software

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