Path: Home => AVR overview => Applications => DCF77 receivers => Direct receiver Diese Seite in Deutsch:

Applications of
AVR single chip controllers AT90S, ATtiny, ATmega and ATxmega
DCF77 AM direct receiver with regulated OpAmps and an ATtiny25

This project is experimental. I don't know if it really works as planned here.

10 DCF77 AM direct receiver with gain-regulated OpAmps

DCF direct receivers need a regulated gain amplifier. The reasons for that are that

the information in the DCF77 signal is encoded in the amplitude, so amplification must now be too high to avoid amplitude clipping,
too high amplification leads to self-oscillation of the amplifier. At necessary gains of 5,000 and higher this is an issue.

This concept here uses

two operational amplifiers, that amplify the DCF77 signal, and
uses an FET/resistor divider to regulate its gain, and uses
an oscillation signal from an ATtiny25 to produce the negative voltage to increase the resistance between the Drain and the Source of the FET and so to reduce the gain of the OpAmp (AGC).

A stand-alone version that uses the ATmega324 instead of the ATtiny25 controller, which is equipped with an LCD and a two-way RS232 interface, is presented here.

10.0 Index

Hardware

All drawings are available as Libre-Office-Draw file here.

10.1 Hardware of the regulated OpAmp receiver

10.1.1 Receiver hardware schematic

Schematic of the regulated OpAmp receiver

This is all you need:

The ferrite antenna is brought to resonance with a fixed C and three varactor diodes in parallel to adjust the resonance, if you do not need that part you can replace the three varactors, the whole RC network from OC0A of the ATtiny25 and the capacitors on the cathodes of the varactors. And you can possibly add a trim capacitor to do the resonance trimming manually.
As I do not like the ferrite circuit to be on a different voltage than 0 Volt, and as the CA3140 does not really work as amplifier with its positive input at 0 V (only if you shift the offset voltage on Pins 1 and 5 with a 4k7 trim potentiometer widely to one side - which is not really a stable operation) I decided
1. to divide the amplification load into two portions: one does a pre-amplification by 100, the second stage by 1,000,
2. to operate both opamps at half the operating voltage (+2.5 V),
and to couple the ferrite LC circuit with a capacitor onto the medium voltage. That meant to add a FET driver stage that provides a low resistance signal.
In the first stage the direct amplification is done with the operational amplifier CA3140. Do not use a 741 instead, it does not work properly with a single 5V supply. Gain is fixed at 100 by the two resistors.
Before the signal enters the second stage, a FET driven voltage divider reduces the signal gain. The FET's gate can have between 0 and -4.5V, the 100k is the upper half of the voltage divider. On start-up and with small negative voltages the signal gain is very small.
The remaining signal behind the FET attenuator is then fed into a second opamp. If you don't need the gain of 1,000, because your DCF77 signal strength is already large enough, you can either skip this second opamp (within the near-field of DCF77) or you can reduce its gain by increasing the 1k resistor to 10k or 100k.

The analog signal then is transferred to the controller's ADC3 input pin (see below).

CA3240

There are two opamps of that type available in one 8-pin-package, so you can use one instead of two as well.

Top of page	Index	Hardware

10.1.2 How the antenna circuit works

The 1 mH ferrite coil has been made from a 10-cm ferrite rod, which was covered over its hole length with two to three layers of adhesive tape, on which a coil with 0.25 mm copper wire was twisted. To find out how many windings would be necessary for 1 mH I stopped at 100, 130 and 160 windings and measured the inductivity. With these values I determined the specific inductivity per winding² AL. These values are shown in the table.

Windings	Inductivity [mH]	AL [nH per w²]
100	0.40	39.72
130	0.75	44.56
160	1.05	40.88

The AL value, therefore, is roughly 41 nH/winding². For a 2 mH coil roughly 220 windings would have been necessary.

Ohm's resistance of the 160 windings is 5.6 Ω, inductive resistance at 77.5 kHz is 510 Ω. The C needed for resonance at 77.5 kHz is 4.03 nF. Preferred Styroflex capacitors of 3.3 nF are in the market, so with the three varactor diodes at 243 pF the resonance can be reached. A 3.9 Styroflex would also be fine, but the varactors would then be very small in capacity. You can even use any different capacitors besides Styroflex, because the capacity is regulated anyway so that accuracy and long-term reliability play no roll anyway.

The LC circuit's resistance, when L and C are in resonance at 77.5 kHz, is around 50 kΩ or higher. So usual transistors or PNP/NPN OpAmp entry stages are not recommendable, the OpAmp should have a FET on the input.

Top of page	Index	Hardware

10.1.3 How the regulated OpAmp works

In the original design displayed here I tried to replace the resistor R1 in a linear amplifier stage with a FET. Its gate voltage can be varied between zero and minus 4.6 V. That varies the resistance of the Drain-to-Source pins of the FET between some 100 Ω and up to more than 1 MΩ.

RDSon excerpt from datasheet of the BF245

RDSon excerpt from datasheet of the BF245

This shows the variation of RDSon of the three BF245 FETs. The curve starts at roughly 200 Ω (for a BF245A) or less and, with rising negative voltages on the gate pin, rises to more than 100 kΩ. The BF245C needs higher negative voltages than the A or B type for the same RDSon.

RDSon and achievable gain of the BF256B FET

RDSon and achievable gain of the BF256B FET

This type of diagram is not available for other JFETs. Usually only IDSS is listed, which is the current through the Drain-Source, with the gate at 0 V and at a certain voltage (mostly 15 V) on the drain. This is useful for calculating RDSon at 0 Volt, but yields too high and unrealistic resistances (the 15 V are unrealistic). Therefore I have measured a BF246B by adding a resistor on the drain and measuring the drain's voltage at different gate voltages. The diagram shows for the limited number of measurements that the current through the drain yields realistic RDSon values (in red) and that the calculated OpAmp gain is between one and 100,000.

Unfortunately, the CA3140 does not really work as an amplifier with the positive input pin on ground. Only if you un-balance the bias voltage with a 4k7 trim potentiometer on pins 1 and 5 (with the middle of the potentiometer on Ground) very widely to one side, the amplification starts. The trim range over which the CA3140 then amplifies is very narrow. If you leave this range, the CA3140 starts swinging wildly. The range where it works is depending from the gain and even reacts on the varactor diodes of the attached LC circuit. Nothing you can rely on without running into serious trouble.

I had to change the concept. After trying out different solutions, the schematic shown above has yielded a reliable amplifier. If you reduce the capacitors, e. g. down to 1 nF too much noise and instability is the consequence. Which is to be expected with a high amplification rate of 100,000, because already 10 µV noise already make up 1 V if amplified by 100,000. The positive side is that the FET-decoupled LC circuit, adjusted to DCF77, hasn't reacted on my energy saving lamp, that produces lots of noise near 77.5 kHz (which causes usual commercial receivers to malfunction).

A gain of 100,000 means that 10 µV HF are amplified to 1 V on the output. This amplification is high enough in the near-field and in some distance to DCF77.

As you can see from the diagram of the RDSon of the BF256 the amplification is steeply rising/falling in the middle of the curve. That means that already small change of the negative base voltage of the FET lead to the signal being too small or too large. By adjusting the gain of the two OpAmp stages, you can change the regulating voltage to get to the less steep sides of the diagram. Just change the resistors from the negative input to ground, e. g. to 1 or 10 or 100 kΩ. As both stages do not invert the input signal, even an amplification of 1,000 does not lead to backfeed and wild swinging.

To measure and to convert the DCF77 HF to time and date info use the ATtiny25 controller described here. Select Negative Voltage Generation in the software for the AGC.

Top of page	Index	Hardware