Path: Home => AVR-EN => Applications => DCF77 receiver => Interfering signals    LinkDiese Seite in Deutsch: Flag DE
DCF77 reception Applications of
AVR single chip controllers AT90S, ATtiny, ATmega and ATxmega
DCF77 interfering signals

9 Interfering signals on DCF77's frequency

There are many opportunities why DCF77's signal can be masked by noise:
  1. Self-generated interference signals: the microcontroller near the reception coil generates rectangles, which are themselves or of which their harmonics are on or very near to the reception frequency.
  2. Other electronic equipment, such as laptops, power supplies or current-reduced lamps generate an interfering signal on or near to 77.5 kHz.

9.1 DCF77 interferences by PWMs with the ATtiny25/45/85

When experimenting with DCF77 receivers, that used PWM channels, I realized interferences. Those can be so strong that the whole reception of DCF77 fails.

The following PWM generators can interfere with DCF77: Other PWMs, such as the signal former of the 110kHz-oscillator, do not interfere because their base frequency is already far above 77.5 kHz.

Both PWM generators identified above work with PWM frequencies of 31.25 kHz. Because rectangles of this frequency consist of the ground wave and all odd harmonics (with decreasing amplitude), also their harmonics are interesting.

I have measured the potential interfering signals and played with diverse properties of the PWM generators. Here are the results.

9.1.1 Synchroneous- and asynchroneous modes with the ATtiny25/45/85

TC1 is, unlike all other ATtiny, not a 16-bit but an 8-bit-TC. It can be clocked from the system clock with a prescaler divider. Other than in all other TCs, it allows prescaling not only by 1, 8, 64, 256 and 1,024, but with all powers of two: 1, 2, 4, 8, ... , 16.384. Already this makes the ATtiny25 to a mighty tool. Clocking the TC1 with the system clock and by the prescaler value is called synchronous mode.

The ATtiny25/45/85 has additionally an asynchronous mode. If you switch that on then the TC1' clock source is an on-board 64-MHz-oscillator (alternatively: a 32-MHz- or an 25.6-MHz-oscillator (in ATtiny15 compatibility mode). With those oscillators PWMs at higher frequencies can be ran.

This is a bit confusing, because there a are sooo many opportunities available to clock the TC1-PWM. I have setup a LibreOffice calculation sheet that allows to play with all those modes and properties for download here.

In sync mode the TC1 clock depends from the system clock, which can either be generated from the internal RC oscillator, from an external crystal or resonator or from an external crystal oscillator. I have integrated all commercially available frequencies in those drop-down lists, so you can fit it exactly to your needs. In sync mode the PWM clock can also be prescaled with all named multiples of two. The port register OCR1C can be set to any value between 0 and 255 to select the PWM resolution. This third port register allows to use both channels, OC1A and OC1B, as PWMs.

The latter is also the case in async mode. In async additional High-Speed-Oscillators can be used as clock source, as described above.

As in all cases used here 8-bit-PWMs are required, the following is limited to this case.

9.1.2 Initing the modes

The ATtiny45 on a test stand For the experiments I have build a test generator, which consists of an ATtiny45 and a two-stage RC network of 10kΩ and 1µF on the OC1A- and OC1B output pins. In the standard experiment I have clocked the ATtiny with 8 Mhz (Clock source: internal RC oscillator 8 MHz, CLKPR to 1). Both PWM channels were inited in synchronous mode with a prescaler of 1 and a PWM resolution of 256. As PWM value I used one half, because this produces the largest noise. With that the PWM frequency is 8 MHz / 256 = 31.25 kHz.

The following sub-chapters show how those modes of the ATtiny25/45/85 are set-up in assembler. Setting the sync mode

In sync mode the clock signal stems from the system clock. In the standard case the system clock comes from the internal oscillator with 8 MHz, that can be divided by the CLKPR precaler (1 .. 128). This does the following code sequence:

  ; Init clock prescaler
  ldi rmp,1<<CLKPCE ; Enable prescaler change
  out CLKPR,rmp
  ldi rmp,(cClkPsr-1) ; Load prescaler
  out CLKPR,rmp

The synch mode for the two PWM channels is inited with this sequence:

  ; Init sync mode
  ldi rmp,cTestPwmA ; PWM start A
  out OCR1A,rmp ; to channel A
  ldi rmp,cTestPwmB ; PWM start B
  out OCR1B,rmp ; to channel B
  ldi rmp,255 ; Set 8 bit PWM
  out OCR1C,rmp
  ldi rmp,(1<<PWM1B)|(1<<COM1B1) ; Positive PWM
  out GTCCR,rmp
  ldi rmp,(1<<PWM1A)|(1<<COM1A1)|(1<<CS10) ; Prescaler to 1
  out TCCR1,rmp
  ldi rmp,1<<OCIE1A ; Enable interrupts
  out TIMSK,rmp

I added the interrupt to enable a countdown of a 16-bit counter value that blinks the green LED attached to PB2. The counter value reflects the speed of the PWM, so blinks in the same rhythm under all PWM speeds. Selecting async mode

The initiation of the async mode is more trickier. First the high-speed-oscillator has to be started by setting the PLLE bit in the PLL control register PLLSCR. The bit LSM forces the frequency low to 32 MHz (LSM=1).

Then you'll have to wait until the PLL has reached lock state. This can be seen from the lock bit PLOCK. If this bit is set, the PLL is ready and the modes of the two PWM channels can be set.

This is the init procedure in async mode:

	ldi rmp,(1<<LSM)|(1<<PLLE) ; Switch PLL on, Low-Speed-Mode
	out PLLCSR,rmp
WtLock:	; wait until PLL is locked
  in rmp,PLLCSR ; Read lock bit
  sbrs rmp,PLOCK ; wait for lock bit set
  rjmp WtLock ; not yet set
  ldi rmp,(1<<LSM)|(1<<PCKE)|(1<<PLLE) ; switch PCK on
	out PLLCSR,rmp
	ldi rmp,(1<<PWM1B)|(1<<COM1B1) ; Enable Compare Match B PWM
	out GTCCR,rmp
	ldi rmp,(1<<PWM1A)|(1<<COM1A1)|cTc1Presc ; PWM1A-en, Prescaler,
  out TCCR1,rmp ; OC0A aktive, clear on compare match

Tc1Presc is the prescaler between 1 and 15, in our case 4.

9.1.3 Software for seeting modes

In this assembler source code all modes and prescaler values can be adjusted. By changing the .include line, ATtiny25, 45 or 85 can be selected, all other properties can be changed in the section Configuration.

9.1.4 Measuring the interferences of the PWM

To measure the interference by the PWM I have used a VLF receiver that I had build in the Eighties. It is equipped as follows: This video shows the displayed characteristics of the receiver and the frequency counter in the standard case.

Like to be expected, the third harmonic of the base frequency shows up at ca. 96 kHz with a high amplitude. An unmodulated carrier signal at 129 kHz stems not from the PWM generator. The fifth harmonic has not enough amplitude, shows up with a small resonance and has no interference potential.

Another hint: switch off your laptop after you programmed the ATtiny and before switching the receiver on. Such a laptop produces serious interferences, as discussed in Chapter 9.3.

Conclusion: better select your PWM frequencies with the harmonic list, as provided in the calculation sheet. Do not operate PWMs with 75 to 80 kHz or their third or fifth harmonic at that frequency band.

9.2 Interference by an energie-conserving lamp

The energy-conserving lamp on my tinker shelf produces a strong interfering signal between 40 and 220 kHz. DCF77, even though very near, is only realized with a very small signal on top of this noise, but definitely cannot be decoded by any receiver.

Conclusion: Such an interferer kills each experiment with DCF77.

9.3 Interference by my laptop

To identify signals from my laptop, I placed the receiver near to my Lenovo T430S. The laptop produces a medium random noise spectrum between 40 and 200 o;kHz. At 70 kHz an unmodulated carrier can be heard. The DCF77 signal can be identified clearly, but with a relatively high random noise background. If I would be in a larger distance to DCF77, I wouldn't be able to hear that signal.

Conclusion: Better switch off the laptop or send him to sleep before experimenting with DCF77, or place it in a larger distance.

9.4 Interferences with the laptop's power supply

This power supply device is a phenomena: it produces a very strong signal over the whole band from 40 to 220 kHz. At 215 kHZ a maximum of interference is seen. The relatively strong DCF77 signal cannot be discrimated from the strong noise, no reception signs can be seen. The distance over which this spectrum spreads is relatively short, in 1 m distance anything is fine.

Conclusion: Far, far, away.

©2020 by